The present invention relates to a phase synchronization circuit, and more particularly relates to a receiving counter phase synchronization circuit which synchronizes the phase of the receiving counter to that of the synchronization patterns included in the received bit stream of a synchronous transmission system.
When the multiplexed serial bit stream is transmitted in the Synchronous Transmission Mode (STM) in a digital multiplexing system, the frame information for classfying the received serial bit stream at the receiving terminal is included in the transmitted multiplexed serial bit stream.
This transmission system is widely applied for the telephone switching network or the long distance transmission between various data networks.
In this transmission systems, however, there are an asynchronous system and a synchronous system, the one transmits the predetermined data pattern nonperiodically and the other transmits that periodically.
In the case of making use of the synchronous system, a synchronization circuit is required, which synchronizes quickly and effectively the phase of the receiving counter offering the timing signal for classfying the received bit stream at the receiving terminal, to the phase of the synchronization pattern included in the bit stream.
However, in the telephone switching networks or the data communication networks, the phase synchronous circuits have been greatly investigated and developed on the standardized transmission speed and form, but those circuits could not be in general applied to for the unstandardized transmission speed and form.